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What should be considered in HDI design?

What should be considered in HDI design?

2019-11-22

Nowadays, high density interconnects (HDI) printed circuit board is widely used. Traditional HDI circuit board is used in portable products and semiconductor packaging products. This paper will focus on the third type of application of HDI: high-speed industrial system application, which is used in telecommunication and computer systems. The difference between these two types of PCB lies in the large size of PCB, the focus on electrical performance, and the challenge of conductor lies in the very complex packaging of PBGA and CCGA.

For designers, the first thing to pay attention to is to design high-speed system according to the design intent. It is necessary to understand how to use materials in the system to meet the performance indicators of physical devices.

PCB material selection, stack structure and design rules will affect electrical performance (such as characteristic impedance, crosstalk and signal regulation). Device density will also show the function of PCB wiring rules, design specifications, material selection and micro vias structure selection. The buried and blind holes are simple structures for those complex and build-up multilayer circuit boards.


Three typical application platforms of HDI


The classification of HDI products is determined by the recent development of HDI and its strong demand for products. Mobile communication companies and their suppliers play a leading role in this field and set many standards. Accordingly, the demand for products also makes the technical limitations of mass production change, and the price becomes more affordable. Japan's consumer industries are already ahead in HDI products. The computer and network industry has not yet felt the strong pressure of the HDI technology approach, but due to the increase of component density, they will soon face such pressure and enable HDI technology. In view of the shrinking gap and increasing I / O number, the advantages of using HDI substrate in flip-chip packaging are very obvious.

HDI technology can be divided into several types. The main driving forces of HDI products are mobile communication products, high-end computer products, and packaging substrates. The technical requirements of these products are totally different, so HDI technology is not one, but several, which are classified as follows:

  • HDI products for miniaturization

  • HDI products for high-density substrates and subdivision functions

  • High-level HDI products


1. Miniaturized HDI products

HDI product miniaturization initially refers to the reduction of finished product size and weight, which is achieved through its own wiring density design and the use of new high-density devices such as uBGAs. In most cases, even if the price of the product remains stable or declines, its function is continuously enhanced. The main structure of internal interconnection is the 6-layer or 8-layer board. Other features of the product are as follows: 10 mil pad, 3-5 mil via, 4 mil line width/line spacing for most parts, PCB thickness also controlled within 40 mils, FR4 or FR4 base material with high TG (160 ℃). This technology is in the leading position in HDI technology. The density design provides smaller size and higher density, including the pins of uBGA or flip-chip.


2. High-density substrate HDI products

The HDI board of high-density substrates is mainly concentrated in the 4 or 6 layers of the board, interconnecting between layers with buried holes, of which at least two layers have micro-holes. The aim is to meet the increased demand for high-density I/O numbers for flip chips. The technology will soon be integrated with HDI to miniaturize the product. This technology is suitable for flip-chip or bond-based substrates, and the micro vias process provides sufficient spacing for high-density flip chips, even if the 2+2 structure of HDI products require the technology.


3. High-level HDI products

High-level HDI boards are typically traditional multi-layer boards with laser drilling from the 1st to the 2nd or 1st to the 3rd layer. Micro-via processing on glass-reinforced materials is another feature using the necessary sequential lamination technology. The purpose of this technique is to reserve sufficient component space to ensure the required impedance level. This technology is suitable for high-level HDI boards with high I/O number or fine pitch components, the buried hole process is not necessary for this product, the micro-via process is only intended to form a spacing between high-density devices (e.g. high I/O component, uBGA), the dielectric materials of HDI products can be resin-coated copper foil (RCF) or prepreg.



 

High-performance product platform


There are five main drivers to consider in the development of high-performance HDI products, which interact with each other. These factors are:

  • Circuit (signal integrity)

  • Components

  • Substrate

  • Lamination and design rules

  • Consideration of the assembly process


Designing this micro-via printed circuit board is a very complex task, although the circuit is extremely important due to the consideration of signal integrity, the cost factor cannot be ignored. Based on this, the compromise scheme must be considered in practice.

1. Circuit (signal integrity) consideration

The performance of the actual circuit varies with the rising time of the signal. Because these HDI boards with large area and high-performance requirements process high-speed computer bus or telecommunications signals, they are very sensitive to noise and signal reflection. The following five most essential characteristics describe the sensitivity of the signal:

  • Characteristic impedance

  • Low voltage differential signal (LVDS)

  • Signal attenuation

  • Noise sensitivity

  • Crosstalk interference

  • Signal integrity factor

The characteristic impedance of single-ended micro strip line, strip line, coplanar and differential signal is determined by the dielectric constant, thickness, stack up structure and design rules of the substrate.

The attenuation of the signal is the result of the dielectric loss of the material, the design rule and the length of the circuit.

All kinds of noise, including crosstalk, such as ground bounce, switching noise, power supply spikes, etc. It is the result of the interaction of power coupling, ground , design rules and raw material characteristics determined by the laminated structure of the PCB board.

One of the main goals of improving the signal integrity of the high-speed signal board is to reduce the inductance.

SMT pads with low inductance are usually pads that have no wiring or use the VIP (Via-in-pad) process.

 

2. Consideration of components

The widespread use of high I/O number, fine spacing BGA and uBGA technology is an important reason why micro-via technology has been widely used in these large area multilayer PCBs.

Even if the device uses a finer 1.0 or 0.8mm spacing, due to the increasing number of I/O, the number of components is still very large, which increases the difficulty of signal wiring.

Some large and complex BGA solve these problems by using eutectic (co-fired) ceramic substrate. If one side of the ceramic is approaching the 32-34mm, the solder column will replace the solder ball.

The following factors will affect the design:

  • SMT spacing

  • I/O number

  • components size

  • Solder ball /solder column

 

3  Consideration of substrate

The substrate characteristics of high performance multilayer PCB board are the most important factors to be considered. The properties of the five substrates below interact with other design factors

  • Board thickness

  • Dielectric constant (Dk)

  • Dissipation factor (Dj) / dielectric loss angle

  • Linear thermal expansion coefficient (CTE)

  • Glass transition temperature (Tg)

Dielectric constant (Dk) and dissipation factor are the two main characteristics that affect electrical properties. Many epoxy-free resins can be used, as well as many types of reinforced fiber materials (including back adhesive copper foil without reinforcement) (RCF-Resin Coated Foil). The combination of the above two factors determines the dielectric properties of the substrate, and the resin also has a typical glass transition temperature-TG value.

 

4. Consideration of stacking

The uncertainty of board stacking and design rules has a certain impact on printed circuit board manufacturers, which requires to be controlled within the production capacity of the PCB manufacturer otherwise the design goal can not be achieved.

The following factors are crucial:

  • Plate thickness

  • VIP process

  • Design rules

  • Via structure

  • Breakthrough mode

The via-in-pad technology using the micro-via process can easily reach the 8mil (0.2mm) pad, which is larger than the buried hole. The capacity of the transmission line determined by the signal layer and design rules is larger than that of the transmission line required by the component and circuit.


There are many models for predicting circuit requirements in reality. Here are eight commonly used models.

  • HP's Design Dense Index

  • Toshiba Technology Map

  • Equivalent Ics Per Square Inch

  • Coors, Anderson & Seward's Statistical Wiring Length Technique

  • Rent's Rule Techniques

  • Section Crossing Technique

  • Geometric Approach

  • Seraphim Wiring Factor


According to the evaluation of the circuit requirements, the capacity of different circuits is predictable, and the design rules and laminated structure determine this capacity. The following table shows the capabilities of the current PCB industry.


Features

Common PCB

Common HP-HDI

PBGA/MCML HDI

High I/O flip chip

Min trace width (mil)

4

5

3

1.6

Min trace space (mil)

4

5

3

2.0

Min pad space(mil)

14

20

10

9.3

Min diameter of pad(mil)

20

12-14

12

4-5

Via formation

Mechanical

Photoinduced hole/laser hole

Photoinduced/laser /   plasma hole

Multi-beam laser hole

Min diameter of via (mil)

10

4-6

3-7

2.5-3.5

Surface treatment of   pad

SOS Bumps

All

Ni-Au

Micro bumps

Current production capacity   comparison

 

5. Considerations for the assembly process

The last factor to be considered in the design is the assembly process, and the following four necessary design features need to be taken into account:

  • On-line testability

  • SMT assembly spacing

  • Surface size (related to the size of printed solder stencil).

  • Repair

If the via-in-pad process is adopted, the feasibility of online testing becomes the main challenge.

This is because VIP technology cannot use breakthrough mode for large area array components, but is embedded directly into the board, so adding a test pad must take into account the fact that signal integrity cannot be compromised, and because of the change in the coefficient of thermal expansion in the XY direction, therefore, we should also pay attention to the change of the size of the board after assembly.

If the surface size is large and the reference data point of the stencil printed with solder is based on a corner, the change in the radial direction of each linear inch will cause the surface size to deviate from the other corners by 0.4 inches. For a 12inch × 16inch board, a deviation of up to 5-7mil may occur at its farther corner.

If a fine spacing uBGA is used, this will be the main cause of poor welding, and it is impossible for such devices to be repaired.

In order to return to repair is more feasible, the characteristics of the substrate are particularly important. When removing components, rewelding pads, and reinstalling new devices, the substrate should be able to withstand concentrated thermal shock that can not lead to peeling.

 

Conclusion


High-performance HDI products are carriers of complex components, which have the following characteristics: high I/O number, finer spacing, extremely high circuit frequency, and fast signal rise time. In this way, the requirement of signal integrity is very strict, and naturally, the requirement of the substrate is strict, and the selection of through-hole structure, stacking scheme and design rules is more complex.


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